Applications Specific Integrated Circuit or ASICs, as well as other circuits, often use conventional Static Random Access Memory (SRAM). Conventional SRAM typically employs built-in self-test or BIST circuitry. An example of conventional circuit 100 that employs SRAM 102 with BIST circuitry can be seen in FIG. 1. Generally, a BIST controller 110 uses numerous data lines (e.g., RA, WA, TRD, pass/fail). To use all of these data lines, multiplexers or muxes 104 and 108 are employed, which can cause severe performance penalties. In addition to the performance penalties of the muxes 104 and 108, performance penalties can also be present from the comparators 106. Moreover, BIST circuitry consumes a considerable amount of power and generally has a substantial footprint, which is also undesirable.
Some examples of conventional circuits are: U.S. Pat. No. 4,493,077; U.S. Pat. No. 5,631,911; U.S. Pat. No. 5,917,832; U.S. Pat. No. 5,961,653; U.S. Pat. No. 6,611,934; U.S. Pat. No. 6,763,485; U.S. Pat. No. 6,925,590; U.S. Pat. No. 7,383,480; U.S. Pat. No. 7,516,379; U.S. Patent Pre-Grant Publ. No. 2003/0131295; U.S. Patent Pre-Grant Publ. No. 2003/0200493; U.S. Patent Pre-Grant Publ. No. 2005/0010832; U.S. Patent Pre-Grant Publ. No. 2005/0210179; U.S. Patent Pre-Grant Publ. No. 2005/0235185; and U.S. Patent Pre-Grant Publ. No. 2008/0091995.